Merge hekate 5.1.0 changes
This commit is contained in:
shchmue
parent
cdb29719e4
commit
b3a739592e
46 changed files with 1525 additions and 224 deletions
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@ -36,9 +36,9 @@ void nx_emmc_gpt_parse(link_t *gpt, sdmmc_storage_t *storage)
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part->lba_end = ent->lba_end;
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part->attrs = ent->attrs;
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//HACK
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for (u32 j = 0; j < 36; j++)
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part->name[j] = ent->name[j];
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// ASCII conversion. Copy only the LSByte of the UTF-16LE name.
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for (u32 i = 0; i < 36; i++)
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part->name[i] = ent->name[i];
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part->name[36] = 0;
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list_append(gpt, &part->link);
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@ -1,8 +1,8 @@
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/*
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* include/linux/mmc/sd.h
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*
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* Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved.
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2005-2007 Pierre Ossman, All Rights Reserved.
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -40,7 +40,9 @@
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#define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */
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#define SD_OCR_XPC (1 << 28) /* SDXC power control */
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#define SD_OCR_CCS (1 << 30) /* Card Capacity Status */
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#define SD_OCR_VDD_27_34 (0x7F << 15) /* VDD voltage 2.7 ~ 3.4 */
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#define SD_OCR_VDD_32_33 (1 << 20) /* VDD voltage 3.2 ~ 3.3 */
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#define SD_OCR_VDD_18 (1 << 7) /* VDD voltage 1.8 */
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/*
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* SD_SWITCH argument format:
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018-2019 CTCaer
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* Copyright (c) 2018-2019 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -19,6 +19,7 @@
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#include "sdmmc.h"
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#include "mmc.h"
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#include "sd.h"
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#include "../../common/memory_map.h"
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#include "../gfx/gfx.h"
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#include "../mem/heap.h"
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#include "../utils/util.h"
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@ -220,10 +221,10 @@ static int _mmc_storage_get_op_cond_inner(sdmmc_storage_t *storage, u32 *pout, u
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switch (power)
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{
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case SDMMC_POWER_1_8:
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arg = 0x40000080; //Sector access, voltage.
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arg = SD_OCR_CCS | SD_OCR_VDD_18;
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break;
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case SDMMC_POWER_3_3:
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arg = 0x403F8000; //Sector access, voltage.
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arg = SD_OCR_CCS | SD_OCR_VDD_27_34;
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break;
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default:
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return 0;
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@ -248,7 +249,7 @@ static int _mmc_storage_get_op_cond(sdmmc_storage_t *storage, u32 power)
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if (cond & MMC_CARD_BUSY)
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{
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if (cond & 0x40000000)
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if (cond & SD_OCR_CCS)
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storage->has_sector_access = 1;
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return 1;
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@ -569,7 +570,7 @@ DPRINTF("[MMC] BKOPS disabled\n");
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if (!_mmc_storage_enable_highspeed(storage, storage->ext_csd.card_type, type))
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return 0;
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DPRINTF("[MMC] succesfully switched to highspeed mode\n");
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DPRINTF("[MMC] succesfully switched to HS mode\n");
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sdmmc_sd_clock_ctrl(storage->sdmmc, 1);
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@ -819,17 +820,17 @@ void _sd_storage_set_current_limit(sdmmc_storage_t *storage, u8 *buf)
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switch (pwr)
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{
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case SD_SET_CURRENT_LIMIT_800:
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DPRINTF("[SD] Power limit raised to 800mA\n");
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DPRINTF("[SD] power limit raised to 800mA\n");
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break;
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case SD_SET_CURRENT_LIMIT_600:
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DPRINTF("[SD] Power limit raised to 600mA\n");
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DPRINTF("[SD] power limit raised to 600mA\n");
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break;
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case SD_SET_CURRENT_LIMIT_400:
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DPRINTF("[SD] Power limit raised to 800mA\n");
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DPRINTF("[SD] power limit raised to 800mA\n");
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break;
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default:
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case SD_SET_CURRENT_LIMIT_200:
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DPRINTF("[SD] Power limit defaulted to 200mA\n");
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DPRINTF("[SD] power limit defaulted to 200mA\n");
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break;
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}
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}
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@ -857,7 +858,7 @@ DPRINTF("[SD] SD supports selected (U)HS mode\n");
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return 1;
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}
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int _sd_storage_enable_highspeed_low_volt(sdmmc_storage_t *storage, u32 type, u8 *buf)
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int _sd_storage_enable_uhs_low_volt(sdmmc_storage_t *storage, u32 type, u8 *buf)
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{
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// Try to raise the current limit to let the card perform better.
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_sd_storage_set_current_limit(storage, buf);
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@ -878,7 +879,7 @@ int _sd_storage_enable_highspeed_low_volt(sdmmc_storage_t *storage, u32 type, u8
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{
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type = 11;
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hs_type = UHS_SDR104_BUS_SPEED;
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DPRINTF("[SD] Bus speed set to SDR104\n");
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DPRINTF("[SD] bus speed set to SDR104\n");
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storage->csd.busspeed = 104;
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break;
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}
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@ -887,7 +888,7 @@ DPRINTF("[SD] Bus speed set to SDR104\n");
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{
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type = 10;
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hs_type = UHS_SDR50_BUS_SPEED;
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DPRINTF("[SD] Bus speed set to SDR50\n");
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DPRINTF("[SD] bus speed set to SDR50\n");
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storage->csd.busspeed = 50;
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break;
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}
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@ -896,7 +897,7 @@ DPRINTF("[SD] Bus speed set to SDR50\n");
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return 0;
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type = 8;
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hs_type = UHS_SDR12_BUS_SPEED;
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DPRINTF("[SD] Bus speed set to SDR12\n");
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DPRINTF("[SD] bus speed set to SDR12\n");
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storage->csd.busspeed = 12;
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break;
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default:
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@ -916,7 +917,7 @@ DPRINTF("[SD] config tuning\n");
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return _sdmmc_storage_check_status(storage);
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}
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int _sd_storage_enable_highspeed_high_volt(sdmmc_storage_t *storage, u8 *buf)
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int _sd_storage_enable_hs_high_volt(sdmmc_storage_t *storage, u8 *buf)
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{
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if (!_sd_storage_switch_get(storage, buf))
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return 0;
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@ -1064,8 +1065,9 @@ void sdmmc_storage_init_wait_sd()
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int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32 bus_width, u32 type)
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{
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int is_version_1 = 0;
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u8 *buf = (u8 *)SDMMC_UPPER_BUFFER;
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// Some cards (Sandisk U1), do not like a fast power cycle. Wait min 100ms.
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// Some cards (SanDisk U1), do not like a fast power cycle. Wait min 100ms.
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sdmmc_storage_init_wait_sd();
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memset(storage, 0, sizeof(sdmmc_storage_t));
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@ -1138,12 +1140,8 @@ DPRINTF("[SD] set blocklen to 512\n");
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return 0;
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DPRINTF("[SD] cleared card detect\n");
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u8 *buf = (u8 *)malloc(512);
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if (!_sd_storage_get_scr(storage, buf))
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{
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free(buf);
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return 0;
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}
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//gfx_hexdump(0, storage->raw_scr, 8);
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DPRINTF("[SD] got scr\n");
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@ -1152,10 +1150,8 @@ DPRINTF("[SD] got scr\n");
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if (bus_width == SDMMC_BUS_WIDTH_4 && (storage->scr.bus_widths & 4) && (storage->scr.sda_vsn & 0xF))
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{
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if (!_sd_storage_execute_app_cmd_type1(storage, &tmp, SD_APP_SET_BUS_WIDTH, SD_BUS_WIDTH_4, 0, R1_STATE_TRAN))
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{
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free(buf);
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return 0;
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}
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sdmmc_set_bus_width(storage->sdmmc, SDMMC_BUS_WIDTH_4);
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DPRINTF("[SD] switched to wide bus width\n");
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}
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@ -1166,20 +1162,15 @@ DPRINTF("[SD] SD does not support wide bus width\n");
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if (storage->is_low_voltage)
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{
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if (!_sd_storage_enable_highspeed_low_volt(storage, type, buf))
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{
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free(buf);
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if (!_sd_storage_enable_uhs_low_volt(storage, type, buf))
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return 0;
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}
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DPRINTF("[SD] enabled UHS\n");
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}
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else if (type != 6 && (storage->scr.sda_vsn & 0xF) != 0)
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{
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if (!_sd_storage_enable_highspeed_high_volt(storage, buf))
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{
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free(buf);
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if (!_sd_storage_enable_hs_high_volt(storage, buf))
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return 0;
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}
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DPRINTF("[SD] enabled HS\n");
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storage->csd.busspeed = 25;
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}
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@ -1192,7 +1183,6 @@ DPRINTF("[SD] enabled HS\n");
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DPRINTF("[SD] got sd status\n");
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}
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free(buf);
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return 1;
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}
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (C) 2018 CTCaer
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* Copyright (c) 2018 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -252,7 +252,7 @@ int sdmmc_setup_clock(sdmmc_t *sdmmc, u32 type)
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u32 tmp;
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u16 divisor;
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clock_sdmmc_get_params(&tmp, &divisor, type);
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clock_sdmmc_get_card_clock_div(&tmp, &divisor, type);
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clock_sdmmc_config_clock_source(&tmp, sdmmc->id, tmp);
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sdmmc->divisor = (tmp + divisor - 1) / divisor;
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@ -722,7 +722,7 @@ static int _sdmmc_check_mask_interrupt(sdmmc_t *sdmmc, u16 *pout, u16 mask)
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sdmmc->regs->norintsts = norintsts & mask;
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return SDMMC_MASKINT_MASKED;
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}
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return SDMMC_MASKINT_NOERROR;
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}
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@ -767,7 +767,7 @@ static int _sdmmc_stop_transmission_inner(sdmmc_t *sdmmc, u32 *rsp)
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if (!res)
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return 0;
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_sdmmc_cache_rsp(sdmmc, rsp, 4, SDMMC_RSP_TYPE_1);
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return _sdmmc_wait_prnsts_type1(sdmmc);
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@ -830,7 +830,7 @@ static int _sdmmc_config_dma(sdmmc_t *sdmmc, u32 *blkcnt_out, sdmmc_req_t *req)
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trnmode |= TEGRA_MMC_TRNMOD_DATA_XFER_DIR_SEL_READ;
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if (req->is_auto_cmd12)
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trnmode = (trnmode & 0xFFF3) | TEGRA_MMC_TRNMOD_AUTO_CMD12;
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bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY);
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bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY, false);
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sdmmc->regs->trnmod = trnmode;
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return 1;
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@ -855,7 +855,7 @@ static int _sdmmc_update_dma(sdmmc_t *sdmmc)
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break;
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if (intr & TEGRA_MMC_NORINTSTS_XFER_COMPLETE)
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{
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bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY);
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bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY, false);
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return 1; // Transfer complete.
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}
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if (intr & TEGRA_MMC_NORINTSTS_DMA_INTERRUPT)
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@ -901,7 +901,7 @@ static int _sdmmc_execute_cmd_inner(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, sdmmc_req_
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_sdmmc_parse_cmdbuf(sdmmc, cmd, is_data_present);
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int res = _sdmmc_wait_request(sdmmc);
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DPRINTF("rsp(%d): %08X, %08X, %08X, %08X\n", res,
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DPRINTF("rsp(%d): %08X, %08X, %08X, %08X\n", res,
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sdmmc->regs->rspreg0, sdmmc->regs->rspreg1, sdmmc->regs->rspreg2, sdmmc->regs->rspreg3);
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if (res)
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{
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@ -943,7 +943,7 @@ static int _sdmmc_config_sdmmc1()
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gpio_output_enable(GPIO_PORT_Z, GPIO_PIN_1, GPIO_OUTPUT_DISABLE);
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usleep(100);
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// Check if SD card is inserted.
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// Check if SD card is inserted.
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if(!!gpio_read(GPIO_PORT_Z, GPIO_PIN_1))
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return 0;
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@ -1015,7 +1015,7 @@ int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type, int n
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u32 clock;
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u16 divisor;
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clock_sdmmc_get_params(&clock, &divisor, type);
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clock_sdmmc_get_card_clock_div(&clock, &divisor, type);
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clock_sdmmc_enable(id, clock);
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sdmmc->clock_stopped = 0;
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@ -1055,7 +1055,7 @@ void sdmmc_end(sdmmc_t *sdmmc)
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if (!sdmmc->clock_stopped)
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{
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_sdmmc_sd_clock_disable(sdmmc);
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// Disable SDMMC power.
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// Disable SDMMC power.
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_sdmmc_set_voltage(sdmmc, SDMMC_POWER_OFF);
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// Disable SD card power.
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@ -1134,7 +1134,7 @@ int sdmmc_enable_low_voltage(sdmmc_t *sdmmc)
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_sdmmc_set_voltage(sdmmc, SDMMC_POWER_1_8);
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_sdmmc_get_clkcon(sdmmc);
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msleep(5);
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if (sdmmc->regs->hostctl2 & SDHCI_CTRL_VDD_180)
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{
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sdmmc->regs->clkcon |= TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE;
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