Update to hekate bdk 5.5.6
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93909f149e
commit
a7712b173c
95 changed files with 2720 additions and 1684 deletions
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@ -29,7 +29,7 @@ u8 btn_read()
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res |= BTN_VOL_DOWN;
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if (!gpio_read(GPIO_PORT_X, GPIO_PIN_6))
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res |= BTN_VOL_UP;
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if (i2c_recv_byte(4, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFSTAT) & 0x4)
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if (i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFSTAT) & MAX77620_ONOFFSTAT_EN0)
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res |= BTN_POWER;
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return res;
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}
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@ -21,16 +21,16 @@
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#include <mem/heap.h>
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#include <utils/types.h>
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#define MAX_ENTRIES 64
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char *dirlist(const char *directory, const char *pattern, bool includeHiddenFiles, bool parse_dirs)
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{
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u8 max_entries = 61;
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int res = 0;
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u32 i = 0, j = 0, k = 0;
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DIR dir;
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FILINFO fno;
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char *dir_entries = (char *)calloc(max_entries, 256);
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char *dir_entries = (char *)calloc(MAX_ENTRIES, 256);
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char *temp = (char *)calloc(1, 256);
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if (!pattern && !f_opendir(&dir, directory))
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@ -49,7 +49,7 @@ char *dirlist(const char *directory, const char *pattern, bool includeHiddenFile
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{
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strcpy(dir_entries + (k * 256), fno.fname);
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k++;
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if (k > (max_entries - 1))
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if (k > (MAX_ENTRIES - 1))
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break;
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}
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}
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@ -64,7 +64,7 @@ char *dirlist(const char *directory, const char *pattern, bool includeHiddenFile
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{
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strcpy(dir_entries + (k * 256), fno.fname);
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k++;
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if (k > (max_entries - 1))
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if (k > (MAX_ENTRIES - 1))
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break;
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}
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res = f_findnext(&dir, &fno);
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@ -66,14 +66,14 @@ ini_sec_t *_ini_create_section(link_t *dst, ini_sec_t *csec, char *name, u8 type
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int ini_parse(link_t *dst, char *ini_path, bool is_dir)
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{
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FIL fp;
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u32 lblen;
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u32 pathlen = strlen(ini_path);
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u32 k = 0;
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char lbuf[512];
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char *filelist = NULL;
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FIL fp;
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ini_sec_t *csec = NULL;
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char *lbuf = NULL;
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char *filelist = NULL;
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char *filename = (char *)malloc(256);
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strcpy(filename, ini_path);
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@ -114,6 +114,8 @@ int ini_parse(link_t *dst, char *ini_path, bool is_dir)
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return 0;
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}
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lbuf = malloc(512);
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do
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{
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// Fetch one line.
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@ -168,6 +170,7 @@ int ini_parse(link_t *dst, char *ini_path, bool is_dir)
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}
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} while (is_dir);
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free(lbuf);
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free(filename);
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free(filelist);
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@ -56,7 +56,7 @@ static u32 _putn(char *buffer, u32 v, int base, char fill, int fcnt) {
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return _puts(buffer, p);
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}
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u32 sprintf(char *buffer, const char *fmt, ...) {
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u32 s_printf(char *buffer, const char *fmt, ...) {
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va_list ap;
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int fill, fcnt;
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u32 count = 0;
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@ -19,6 +19,6 @@
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#include "types.h"
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u32 sprintf(char *buffer, const char *fmt, ...);
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u32 s_printf(char *buffer, const char *fmt, ...);
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#endif
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@ -22,7 +22,7 @@
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#define ALWAYS_INLINE inline __attribute__((always_inline))
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#define ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1))
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#define ALIGN_DOWN(x, a) (((x) - ((a) - 1)) & ~((a) - 1))
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#define ALIGN_DOWN(x, a) ((x) & ~((a) - 1))
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#define BIT(n) (1U << (n))
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#define MAX(a, b) ((a) > (b) ? (a) : (b))
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#define MIN(a, b) ((a) < (b) ? (a) : (b))
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@ -74,6 +74,9 @@ typedef int bool;
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#define true 1
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#define false 0
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#define DISABLE 0
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#define ENABLE 1
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#define BOOT_CFG_AUTOBOOT_EN BIT(0)
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#define BOOT_CFG_FROM_LAUNCH BIT(1)
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#define BOOT_CFG_FROM_ID BIT(2)
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018 CTCaer
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* Copyright (c) 2018-2020 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -44,7 +44,7 @@ u32 get_tmr_ms()
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u32 get_tmr_us()
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{
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return TMR(TIMERUS_CNTR_1US); //TIMERUS_CNTR_1US
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return TMR(TIMERUS_CNTR_1US);
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}
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void msleep(u32 ms)
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@ -132,53 +132,58 @@ void panic(u32 val)
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usleep(1);
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}
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void reboot_normal()
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void power_set_state(power_state_t state)
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{
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u8 reg;
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// Unmount and power down sd card.
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sd_end();
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hw_reinit_workaround(false, 0);
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panic(0x21); // Bypass fuse programming in package1.
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}
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void reboot_rcm()
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{
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sd_end();
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hw_reinit_workaround(false, 0);
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PMC(APBDEV_PMC_SCRATCH0) = PMC_SCRATCH0_MODE_RCM;
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PMC(APBDEV_PMC_CNTRL) |= PMC_CNTRL_MAIN_RST;
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while (true)
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bpmp_halt();
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}
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void reboot_full()
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{
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sd_end();
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hw_reinit_workaround(false, 0);
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// Enable soft reset wake event.
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u8 reg = i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG2);
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reg |= MAX77620_ONOFFCNFG2_SFT_RST_WK;
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG2, reg);
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// Do a soft reset.
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_SFT_RST);
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while (true)
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bpmp_halt();
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}
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void power_off()
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{
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sd_end();
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// De-initialize and power down various hardware.
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hw_reinit_workaround(false, 0);
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// Stop the alarm, in case we injected and powered off too fast.
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max77620_rtc_stop_alarm();
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_PWR_OFF);
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// Set power state.
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switch (state)
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{
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case REBOOT_RCM:
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PMC(APBDEV_PMC_SCRATCH0) = PMC_SCRATCH0_MODE_RCM; // Enable RCM path.
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PMC(APBDEV_PMC_CNTRL) |= PMC_CNTRL_MAIN_RST; // PMC reset.
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break;
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case REBOOT_BYPASS_FUSES:
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panic(0x21); // Bypass fuse programming in package1.
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break;
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case POWER_OFF:
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// Initiate power down sequence and do not generate a reset (regulators retain state).
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_PWR_OFF);
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break;
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case POWER_OFF_RESET:
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case POWER_OFF_REBOOT:
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default:
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// Enable/Disable soft reset wake event.
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reg = i2c_recv_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG2);
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if (state == POWER_OFF_RESET) // Do not wake up after power off.
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reg &= ~(MAX77620_ONOFFCNFG2_SFT_RST_WK | MAX77620_ONOFFCNFG2_WK_ALARM1 | MAX77620_ONOFFCNFG2_WK_ALARM2);
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else // POWER_OFF_REBOOT. Wake up after power off.
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reg |= MAX77620_ONOFFCNFG2_SFT_RST_WK;
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG2, reg);
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// Initiate power down sequence and generate a reset (regulators' state resets).
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i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1, MAX77620_ONOFFCNFG1_SFT_RST);
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break;
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}
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while (true)
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bpmp_halt();
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}
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void power_set_state_ex(void *param)
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{
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power_state_t *state = (power_state_t *)param;
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power_set_state(*state);
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}
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@ -21,6 +21,16 @@
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#include <utils/types.h>
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#include <mem/minerva.h>
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typedef enum
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{
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REBOOT_RCM, // PMC reset. Enter RCM mode.
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REBOOT_BYPASS_FUSES, // PMC reset via watchdog. Enter Normal mode. Bypass fuse programming in package1.
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POWER_OFF, // Power off PMIC. Do not reset regulators.
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POWER_OFF_RESET, // Power off PMIC. Reset regulators.
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POWER_OFF_REBOOT, // Power off PMIC. Reset regulators. Power on.
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} power_state_t;
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typedef enum
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{
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NYX_CFG_BIS = BIT(5),
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#define byte_swap_32(num) ((((num) >> 24) & 0xff) | (((num) << 8) & 0xff0000) | \
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(((num) >> 8 )& 0xff00) | (((num) << 24) & 0xff000000))
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#define byte_swap_16(num) ((((num) >> 8) & 0xff) | (((num) << 8) & 0xff00))
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typedef struct _cfg_op_t
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{
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u32 off;
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@ -49,6 +61,10 @@ typedef struct _cfg_op_t
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typedef struct _nyx_info_t
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{
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u32 magic;
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u32 sd_init;
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u32 sd_errors[3];
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u8 rsvd[0x1000];
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u32 disp_id;
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u32 errors;
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} nyx_info_t;
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@ -65,17 +81,18 @@ typedef struct _nyx_storage_t
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emc_table_t mtc_table[10];
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} nyx_storage_t;
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void exec_cfg(u32 *base, const cfg_op_t *ops, u32 num_ops);
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u32 crc32_calc(u32 crc, const u8 *buf, u32 len);
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u32 get_tmr_us();
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u32 get_tmr_ms();
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u32 get_tmr_s();
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void usleep(u32 us);
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void msleep(u32 ms);
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void panic(u32 val);
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void reboot_normal();
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void reboot_rcm();
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void reboot_full();
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void power_off();
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void exec_cfg(u32 *base, const cfg_op_t *ops, u32 num_ops);
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u32 crc32_calc(u32 crc, const u8 *buf, u32 len);
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void power_set_state(power_state_t state);
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void power_set_state_ex(void *param);
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#endif
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