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Add BPMP overclock, add hekate fixes, fix sprintf

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This commit is contained in:
shchmue 2019-09-14 22:16:10 -06:00
parent 34890f0025
commit 82bea6be8f
39 changed files with 1130 additions and 544 deletions
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9
source/mem/heap.c
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@ -107,17 +107,12 @@ void heap_init(u32 base)
void *malloc(u32 size)
{
return (void *)_heap_alloc(&_heap, size, 0x10);
}
void *memalign(u32 align, u32 size)
{
return (void *)_heap_alloc(&_heap, size, align);
return (void *)_heap_alloc(&_heap, size, sizeof(hnode_t));
}
void *calloc(u32 num, u32 size)
{
void *res = (void *)_heap_alloc(&_heap, num * size, 0x10);
void *res = (void *)_heap_alloc(&_heap, num * size, sizeof(hnode_t));
memset(res, 0, num * size);
return res;
}

1
source/mem/heap.h
View file

@ -23,6 +23,5 @@ void heap_init(u32 base);
void *malloc(u32 size);
void *calloc(u32 num, u32 size);
void free(void *buf);
void *memalign(u32 align, u32 size);
#endif

2
source/mem/mc.c
View file

@ -127,7 +127,7 @@ void mc_disable_ahb_redirect()
void mc_enable()
{
CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) = (CLOCK(CLK_RST_CONTROLLER_CLK_SOURCE_EMC) & 0x1FFFFFFF) | 0x40000000;
// Enable MIPI CAL clock.
// Enable EMC clock.
CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) = (CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) & 0xFDFFFFFF) | 0x2000000;
// Enable MC clock.
CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) = (CLOCK(CLK_RST_CONTROLLER_CLK_ENB_H_SET) & 0xFFFFFFFE) | 1;

10
source/mem/sdram.c
View file

@ -39,7 +39,13 @@
static u32 _get_sdram_id()
{
return (fuse_read_odm(4) & 0x38) >> 3;
u32 sdram_id = (fuse_read_odm(4) & 0x38) >> 3;
// Check if id is proper.
if (sdram_id > 7)
sdram_id = 0;
return sdram_id;
}
static void _sdram_config(const sdram_params_t *params)
@ -539,7 +545,7 @@ void sdram_init()
const sdram_params_t *params = (const sdram_params_t *)sdram_get_params();
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_SD_CFG2, 0x05);
max77620_regulator_set_voltage(REGULATOR_SD1, 1100000);
max77620_regulator_set_voltage(REGULATOR_SD1, 1100000); // Set DRAM voltage.
PMC(APBDEV_PMC_VDDP_SEL) = params->pmc_vddp_sel;
usleep(params->pmc_vddp_sel_wait);