Merge hekate 5.1.4 changes
This commit is contained in:
shchmue
parent
a7d20c5814
commit
25ff127404
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018-2019 CTCaer
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* Copyright (c) 2018-2020 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -37,12 +37,12 @@ void set_default_configuration()
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h_cfg.autoboot = 0;
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h_cfg.autoboot_list = 0;
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h_cfg.bootwait = 3;
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h_cfg.verification = 1;
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h_cfg.se_keygen_done = 0;
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h_cfg.sbar_time_keeping = 0;
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h_cfg.backlight = 100;
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h_cfg.autohosoff = 0;
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h_cfg.autonogc = 1;
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h_cfg.updater2p = 0;
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h_cfg.brand = NULL;
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h_cfg.tagline = NULL;
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h_cfg.errors = 0;
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@ -50,7 +50,7 @@ void set_default_configuration()
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h_cfg.rcm_patched = true;
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h_cfg.emummc_force_disable = false;
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sd_power_cycle_time_start = 0xFFFFFFF;
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sd_power_cycle_time_start = 0;
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}
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int create_config_entry()
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@ -96,9 +96,6 @@ int create_config_entry()
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f_puts("\nbootwait=", &fp);
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itoa(h_cfg.bootwait, lbuf, 10);
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f_puts(lbuf, &fp);
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f_puts("\nverification=", &fp);
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itoa(h_cfg.verification, lbuf, 10);
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f_puts(lbuf, &fp);
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f_puts("\nbacklight=", &fp);
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itoa(h_cfg.backlight, lbuf, 10);
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f_puts(lbuf, &fp);
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@ -108,6 +105,9 @@ int create_config_entry()
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f_puts("\nautonogc=", &fp);
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itoa(h_cfg.autonogc, lbuf, 10);
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f_puts(lbuf, &fp);
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f_puts("\nupdater2p=", &fp);
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itoa(h_cfg.updater2p, lbuf, 10);
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f_puts(lbuf, &fp);
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if (h_cfg.brand)
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{
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f_puts("\nbrand=", &fp);
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@ -281,10 +281,11 @@ void config_autoboot()
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LIST_INIT(ini_sections);
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u8 max_entries = 30;
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u32 boot_text_size = 512;
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ment_t *ments = (ment_t *)malloc(sizeof(ment_t) * (max_entries + 5));
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u32 *boot_values = (u32 *)malloc(sizeof(u32) * max_entries);
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char *boot_text = (char *)malloc(512 * max_entries);
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char *boot_text = (char *)malloc(boot_text_size * max_entries);
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for (u32 j = 0; j < max_entries; j++)
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boot_values[j] = j;
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@ -330,12 +331,12 @@ void config_autoboot()
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else
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{
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if (h_cfg.autoboot != (i - 4) || h_cfg.autoboot_list)
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boot_text[(i - 4) * 512] = ' ';
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boot_text[(i - 4) * boot_text_size] = ' ';
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else
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boot_text[(i - 4) * 512] = '*';
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strcpy(boot_text + (i - 4) * 512 + 1, ini_sec->name);
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ments[i].caption = &boot_text[(i - 4) * 512];
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boot_text[(i - 4) * boot_text_size] = '*';
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strcpy(boot_text + (i - 4) * boot_text_size + 1, ini_sec->name);
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ments[i].caption = &boot_text[(i - 4) * boot_text_size];
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}
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ments[i].type = ini_sec->type;
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ments[i].data = &boot_values[i - 4];
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@ -391,10 +392,11 @@ void config_bootdelay()
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gfx_con_setpos(0, 0);
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u32 delay_entries = 6;
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u32 delay_text_size = 32;
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ment_t *ments = (ment_t *)malloc(sizeof(ment_t) * (delay_entries + 3));
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u32 *delay_values = (u32 *)malloc(sizeof(u32) * delay_entries);
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char *delay_text = (char *)malloc(32 * delay_entries);
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char *delay_text = (char *)malloc(delay_text_size * delay_entries);
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for (u32 j = 0; j < delay_entries; j++)
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delay_values[j] = j;
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@ -415,14 +417,14 @@ void config_bootdelay()
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for (i = 1; i < delay_entries; i++)
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{
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if (h_cfg.bootwait != i)
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delay_text[i * 32] = ' ';
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delay_text[i * delay_text_size] = ' ';
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else
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delay_text[i * 32] = '*';
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delay_text[i * 32 + 1] = i + '0';
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strcpy(delay_text + i * 32 + 2, " seconds");
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delay_text[i * delay_text_size] = '*';
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delay_text[i * delay_text_size + 1] = i + '0';
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strcpy(delay_text + i * delay_text_size + 2, " seconds");
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ments[i + 2].type = MENT_DATA;
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ments[i + 2].caption = delay_text + i * 32;
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ments[i + 2].caption = delay_text + (i * delay_text_size);
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ments[i + 2].data = &delay_values[i];
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}
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@ -445,69 +447,17 @@ void config_bootdelay()
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btn_wait();
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}
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void config_verification()
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{
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gfx_clear_grey(0x1B);
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gfx_con_setpos(0, 0);
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ment_t *ments = (ment_t *)malloc(sizeof(ment_t) * 6);
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u32 *vr_values = (u32 *)malloc(sizeof(u32) * 3);
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char *vr_text = (char *)malloc(64 * 3);
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for (u32 j = 0; j < 3; j++)
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{
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vr_values[j] = j;
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ments[j + 2].type = MENT_DATA;
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ments[j + 2].data = &vr_values[j];
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}
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ments[0].type = MENT_BACK;
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ments[0].caption = "Back";
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ments[1].type = MENT_CHGLINE;
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strcpy(vr_text, " Disable (Fastest - Unsafe)");
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strcpy(vr_text + 64, " Sparse (Fast - Safe)");
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strcpy(vr_text + 128, " Full (Slow - Safe)");
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for (u32 i = 0; i < 3; i++)
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{
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if (h_cfg.verification != i)
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vr_text[64 * i] = ' ';
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else
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vr_text[64 * i] = '*';
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ments[2 + i].caption = vr_text + (i * 64);
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}
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memset(&ments[5], 0, sizeof(ment_t));
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menu_t menu = {ments, "Backup & Restore verification", 0, 0};
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u32 *temp_verification = (u32 *)tui_do_menu(&menu);
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if (temp_verification != NULL)
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{
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h_cfg.verification = *(u32 *)temp_verification;
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_save_config();
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}
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free(ments);
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free(vr_values);
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free(vr_text);
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if (temp_verification == NULL)
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return;
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btn_wait();
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}
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void config_backlight()
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{
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gfx_clear_grey(0x1B);
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gfx_con_setpos(0, 0);
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u32 bri_text_size = 8;
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u32 bri_entries = 11;
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ment_t *ments = (ment_t *)malloc(sizeof(ment_t) * (bri_entries + 3));
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u32 *bri_values = (u32 *)malloc(sizeof(u32) * bri_entries);
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char *bri_text = (char *)malloc(8 * bri_entries);
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char *bri_text = (char *)malloc(bri_text_size * bri_entries);
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for (u32 j = 1; j < bri_entries; j++)
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bri_values[j] = j * 10;
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@ -521,20 +471,20 @@ void config_backlight()
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for (i = 1; i < bri_entries; i++)
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{
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if ((h_cfg.backlight / 20) != i)
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bri_text[i * 32] = ' ';
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bri_text[i * bri_text_size] = ' ';
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else
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bri_text[i * 32] = '*';
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bri_text[i * bri_text_size] = '*';
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if (i < 10)
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{
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bri_text[i * 32 + 1] = i + '0';
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strcpy(bri_text + i * 32 + 2, "0%");
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bri_text[i * bri_text_size + 1] = i + '0';
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strcpy(bri_text + i * bri_text_size + 2, "0%");
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}
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else
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strcpy(bri_text + i * 32 + 1, "100%");
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strcpy(bri_text + i * bri_text_size + 1, "100%");
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ments[i + 1].type = MENT_DATA;
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ments[i + 1].caption = bri_text + i * 32;
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ments[i + 1].caption = bri_text + (i * bri_text_size);
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ments[i + 1].data = &bri_values[i];
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}
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@ -25,10 +25,10 @@ typedef struct _hekate_config
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u32 autoboot;
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u32 autoboot_list;
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u32 bootwait;
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u32 verification;
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u32 backlight;
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u32 autohosoff;
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u32 autonogc;
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u32 updater2p;
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char *brand;
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char *tagline;
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// Global temporary config.
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@ -40,16 +40,10 @@ typedef struct _hekate_config
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u32 errors;
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} hekate_config;
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typedef enum
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{
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ERR_LIBSYS_LP0 = (1 << 0),
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} hsysmodule_t;
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void set_default_configuration();
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int create_config_entry();
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void config_autoboot();
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void config_bootdelay();
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void config_verification();
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void config_backlight();
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void config_auto_hos_poweroff();
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void config_nogc();
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@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018-2019 CTCaer
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* Copyright (c) 2018-2020 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -44,7 +44,8 @@ static char *_strdup(char *str)
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u32 _find_section_name(char *lbuf, u32 lblen, char schar)
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{
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u32 i;
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for (i = 0; i < lblen && lbuf[i] != schar && lbuf[i] != '\n' && lbuf[i] != '\r'; i++)
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// Depends on 'FF_USE_STRFUNC 2' that removes \r.
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for (i = 0; i < lblen && lbuf[i] != schar && lbuf[i] != '\n'; i++)
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;
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lbuf[i] = 0;
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@ -123,8 +124,8 @@ int ini_parse(link_t *dst, char *ini_path, bool is_dir)
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f_gets(lbuf, 512, &fp);
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lblen = strlen(lbuf);
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// Remove trailing newline.
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if (lbuf[lblen - 1] == '\n' || lbuf[lblen - 1] == '\r')
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// Remove trailing newline. Depends on 'FF_USE_STRFUNC 2' that removes \r.
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if (lblen && lbuf[lblen - 1] == '\n')
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lbuf[lblen - 1] = 0;
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if (lblen > 2 && lbuf[0] == '[') // Create new section.
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@ -134,24 +135,22 @@ int ini_parse(link_t *dst, char *ini_path, bool is_dir)
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csec = _ini_create_section(dst, csec, &lbuf[1], INI_CHOICE);
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list_init(&csec->kvs);
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}
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else if (lblen > 2 && lbuf[0] == '{') //Create new caption.
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else if (lblen > 1 && lbuf[0] == '{') // Create new caption. Support empty caption '{}'.
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{
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_find_section_name(lbuf, lblen, '}');
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csec = _ini_create_section(dst, csec, &lbuf[1], INI_CAPTION);
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csec->color = 0xFF0AB9E6;
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}
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else if (lblen > 2 && lbuf[0] == '#') //Create empty lines and comments.
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else if (lblen > 2 && lbuf[0] == '#') // Create comment.
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{
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_find_section_name(lbuf, lblen, '\0');
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csec = _ini_create_section(dst, csec, &lbuf[1], INI_COMMENT);
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}
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else if (lblen < 2)
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else if (lblen < 2) // Create empty line.
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{
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csec = _ini_create_section(dst, csec, NULL, INI_NEWLINE);
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}
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else if (csec && csec->type == INI_CHOICE) //Extract key/value.
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else if (csec && csec->type == INI_CHOICE) // Extract key/value.
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{
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u32 i = _find_section_name(lbuf, lblen, '=');
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@ -68,7 +68,7 @@ void pkg2_get_newkern_info(u8 *kern_data)
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pkg2_newkern_ini1_end = *(u32 *)(kern_data + pkg2_newkern_ini1_val + 0x8);
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}
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void pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2, bool *new_pkg2)
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bool pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2, bool *new_pkg2)
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{
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u8 *ptr;
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// Check for new pkg2 type.
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@ -76,6 +76,9 @@ void pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2, bool *new_pkg2)
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{
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pkg2_get_newkern_info(pkg2->data);
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if (!pkg2_newkern_ini1_start)
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return false;
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ptr = pkg2->data + pkg2_newkern_ini1_start;
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*new_pkg2 = true;
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}
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@ -95,6 +98,8 @@ void pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2, bool *new_pkg2)
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ptr += ki->size;
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DPRINTF(" kip1 %d:%s @ %08X (%08X)\n", i, kip1->name, (u32)kip1, ki->size);
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}
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return true;
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}
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int pkg2_decompress_kip(pkg2_kip1_info_t* ki, u32 sectsToDecomp)
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@ -87,7 +87,7 @@ typedef struct _pkg2_kip1_info_t
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link_t link;
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} pkg2_kip1_info_t;
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void pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2, bool *new_pkg2);
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bool pkg2_parse_kips(link_t *info, pkg2_hdr_t *pkg2, bool *new_pkg2);
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int pkg2_decompress_kip(pkg2_kip1_info_t* ki, u32 sectsToDecomp);
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pkg2_hdr_t *pkg2_decrypt(void *data);
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@ -441,7 +441,10 @@ get_tsec: ;
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LIST_INIT(kip1_info);
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bool new_pkg2;
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pkg2_parse_kips(&kip1_info, pkg2_hdr, &new_pkg2);
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if (!pkg2_parse_kips(&kip1_info, pkg2_hdr, &new_pkg2)) {
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EPRINTF("Unable to locate INI1.");
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goto pkg2_done;
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}
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LIST_FOREACH_ENTRY(pkg2_kip1_info_t, ki_tmp, &kip1_info, link) {
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if(ki_tmp->kip1->tid == 0x0100000000000000ULL) {
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ki = malloc(sizeof(pkg2_kip1_info_t));
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@ -135,12 +135,14 @@ int sd_save_to_file(void *buf, u32 size, const char *filename)
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#define PATCHED_RELOC_SZ 0x94
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#define PATCHED_RELOC_STACK 0x40007000
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#define PATCHED_RELOC_ENTRY 0x40010000
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#define EXT_PAYLOAD_ADDR 0xC03C0000
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#define EXT_PAYLOAD_ADDR 0xC0000000
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#define RCM_PAYLOAD_ADDR (EXT_PAYLOAD_ADDR + ALIGN(PATCHED_RELOC_SZ, 0x10))
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#define COREBOOT_ADDR (0xD0000000 - 0x100000)
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#define COREBOOT_END_ADDR 0xD0000000
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#define CBFS_DRAM_EN_ADDR 0x4003e000
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#define CBFS_DRAM_MAGIC 0x4452414D // "DRAM"
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static void *coreboot_addr;
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void reloc_patcher(u32 payload_dst, u32 payload_src, u32 payload_size)
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{
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memcpy((u8 *)payload_src, (u8 *)IPL_LOAD_ADDR, PATCHED_RELOC_SZ);
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@ -154,7 +156,7 @@ void reloc_patcher(u32 payload_dst, u32 payload_src, u32 payload_size)
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if (payload_size == 0x7000)
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{
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memcpy((u8 *)(payload_src + ALIGN(PATCHED_RELOC_SZ, 0x10)), (u8 *)COREBOOT_ADDR, 0x7000); //Bootblock
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memcpy((u8 *)(payload_src + ALIGN(PATCHED_RELOC_SZ, 0x10)), coreboot_addr, 0x7000); //Bootblock
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*(vu32 *)CBFS_DRAM_EN_ADDR = CBFS_DRAM_MAGIC;
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}
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}
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@ -184,7 +186,10 @@ int launch_payload(char *path)
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if (size < 0x30000)
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buf = (void *)RCM_PAYLOAD_ADDR;
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else
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buf = (void *)COREBOOT_ADDR;
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{
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coreboot_addr = (void *)(COREBOOT_END_ADDR - size);
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buf = coreboot_addr;
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}
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if (f_read(&fp, buf, size, NULL))
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{
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@ -402,26 +407,35 @@ void _get_key_generations(char *sysnand_label, char *emunand_label) {
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extern void pivot_stack(u32 stack_top);
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// todo: chainload to reboot payload or payloads folder option?
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void ipl_main()
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{
|
||||
// Do initial HW configuration. This is compatible with consecutive reruns without a reset.
|
||||
config_hw();
|
||||
|
||||
// Pivot the stack so we have enough space.
|
||||
pivot_stack(IPL_STACK_TOP);
|
||||
|
||||
// Tegra/Horizon configuration goes to 0x80000000+, package2 goes to 0xA9800000, we place our heap in between.
|
||||
heap_init(IPL_HEAP_START);
|
||||
|
||||
// Set bootloader's default configuration.
|
||||
set_default_configuration();
|
||||
|
||||
sd_mount();
|
||||
|
||||
minerva_init();
|
||||
minerva_change_freq(FREQ_1600);
|
||||
|
||||
display_init();
|
||||
|
||||
u32 *fb = display_init_framebuffer();
|
||||
gfx_init_ctxt(fb, 720, 1280, 720);
|
||||
|
||||
gfx_con_init();
|
||||
|
||||
display_backlight_pwm_init();
|
||||
|
||||
// Overclock BPMP.
|
||||
bpmp_clk_rate_set(BPMP_CLK_DEFAULT_BOOST);
|
||||
|
||||
h_cfg.emummc_force_disable = emummc_load_cfg();
|
||||
|
|
@ -445,6 +459,7 @@ void ipl_main()
|
|||
while (true)
|
||||
tui_do_menu(&menu_top);
|
||||
|
||||
// Halt BPMP if we managed to get out of execution.
|
||||
while (true)
|
||||
bpmp_halt();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (c) 2018-2020 CTCaer
|
||||
* Copyright (c) 2018 M4xw
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
|
|
@ -29,7 +30,7 @@ static void _heap_create(heap_t *heap, u32 start)
|
|||
// Node info is before node address.
|
||||
static u32 _heap_alloc(heap_t *heap, u32 size)
|
||||
{
|
||||
hnode_t *node, *new;
|
||||
hnode_t *node, *new_node;
|
||||
|
||||
// Align to cache line size.
|
||||
size = ALIGN(size, sizeof(hnode_t));
|
||||
|
|
@ -49,22 +50,29 @@ static u32 _heap_alloc(heap_t *heap, u32 size)
|
|||
node = heap->first;
|
||||
while (true)
|
||||
{
|
||||
// Check if there's available unused node.
|
||||
if (!node->used && (size <= node->size))
|
||||
{
|
||||
// Size and offset of the new unused node.
|
||||
u32 new_size = node->size - size;
|
||||
new = (hnode_t *)((u32)node + sizeof(hnode_t) + size);
|
||||
new_node = (hnode_t *)((u32)node + sizeof(hnode_t) + size);
|
||||
|
||||
// If there's aligned leftover space, create a new node.
|
||||
// If there's aligned unused space from the old node,
|
||||
// create a new one and set the leftover size.
|
||||
if (new_size >= (sizeof(hnode_t) << 2))
|
||||
{
|
||||
new->size = new_size - sizeof(hnode_t);
|
||||
new->used = 0;
|
||||
new->next = node->next;
|
||||
new->next->prev = new;
|
||||
new->prev = node;
|
||||
node->next = new;
|
||||
new_node->size = new_size - sizeof(hnode_t);
|
||||
new_node->used = 0;
|
||||
new_node->next = node->next;
|
||||
|
||||
// Check that we are not on first node.
|
||||
if (new_node->next)
|
||||
new_node->next->prev = new_node;
|
||||
|
||||
new_node->prev = node;
|
||||
node->next = new_node;
|
||||
}
|
||||
else
|
||||
else // Unused node size is just enough.
|
||||
size += new_size;
|
||||
|
||||
node->size = size;
|
||||
|
|
@ -72,20 +80,23 @@ static u32 _heap_alloc(heap_t *heap, u32 size)
|
|||
|
||||
return (u32)node + sizeof(hnode_t);
|
||||
}
|
||||
|
||||
// No unused node found, try the next one.
|
||||
if (node->next)
|
||||
node = node->next;
|
||||
else
|
||||
break;
|
||||
}
|
||||
|
||||
new = (hnode_t *)((u32)node + sizeof(hnode_t) + node->size);
|
||||
new->used = 1;
|
||||
new->size = size;
|
||||
new->prev = node;
|
||||
new->next = NULL;
|
||||
node->next = new;
|
||||
// No unused node found, create a new one.
|
||||
new_node = (hnode_t *)((u32)node + sizeof(hnode_t) + node->size);
|
||||
new_node->used = 1;
|
||||
new_node->size = size;
|
||||
new_node->prev = node;
|
||||
new_node->next = NULL;
|
||||
node->next = new_node;
|
||||
|
||||
return (u32)new + sizeof(hnode_t);
|
||||
return (u32)new_node + sizeof(hnode_t);
|
||||
}
|
||||
|
||||
static void _heap_free(heap_t *heap, u32 addr)
|
||||
|
|
@ -101,6 +112,7 @@ static void _heap_free(heap_t *heap, u32 addr)
|
|||
{
|
||||
node->prev->size += node->size + sizeof(hnode_t);
|
||||
node->prev->next = node->next;
|
||||
|
||||
if (node->next)
|
||||
node->next->prev = node->prev;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (c) 2018-2020 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
|
|||
|
|
@ -34,18 +34,21 @@ u32 minerva_init()
|
|||
|
||||
minerva_cfg = NULL;
|
||||
mtc_config_t *mtc_cfg = (mtc_config_t *)&nyx_str->mtc_cfg;
|
||||
memset(mtc_cfg, 0, sizeof(mtc_config_t));
|
||||
|
||||
// Set table to nyx storage.
|
||||
mtc_cfg->mtc_table = (emc_table_t *)&nyx_str->mtc_table;
|
||||
|
||||
mtc_cfg->sdram_id = (fuse_read_odm(4) >> 3) & 0x1F;
|
||||
mtc_cfg->init_done = MTC_NEW_MAGIC; // Initialize mtc table.
|
||||
|
||||
|
||||
u32 ep_addr = ianos_loader(false, "bootloader/sys/libsys_minerva.bso", DRAM_LIB, (void *)mtc_cfg);
|
||||
|
||||
// Ensure that Minerva is new.
|
||||
if (mtc_cfg->init_done == MTC_INIT_MAGIC)
|
||||
minerva_cfg = (void *)ep_addr;
|
||||
else
|
||||
mtc_cfg->init_done = 0;
|
||||
|
||||
if (!minerva_cfg)
|
||||
return 1;
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (c) 2018 balika011
|
||||
* Copyright (c) 2019 CTCaer
|
||||
* Copyright (c) 2019-2020 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
@ -696,7 +696,6 @@ sdram_params_t *sdram_get_params_patched()
|
|||
|
||||
void sdram_init()
|
||||
{
|
||||
//TODO: sdram_id should be in [0,4].
|
||||
const sdram_params_t *params = (const sdram_params_t *)sdram_get_params();
|
||||
|
||||
// Set DRAM voltage.
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
*
|
||||
* Copyright (c) 2011 Samsung Electronics
|
||||
* MyungJoo Ham <myungjoo.ham@samsung.com>
|
||||
* Copyright (c) 2018 CTCaer
|
||||
* Copyright (c) 2018-2020 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
@ -96,14 +96,17 @@ enum MAX17050_reg {
|
|||
MAX17050_K_empty0 = 0x3B,
|
||||
MAX17050_TaskPeriod = 0x3C,
|
||||
MAX17050_FSTAT = 0x3D,
|
||||
|
||||
MAX17050_TIMER = 0x3E,
|
||||
MAX17050_SHDNTIMER = 0x3F,
|
||||
|
||||
MAX17050_QRTbl30 = 0x42,
|
||||
|
||||
MAX17050_dQacc = 0x45,
|
||||
MAX17050_dPacc = 0x46,
|
||||
|
||||
MAX17050_VFSOC0 = 0x48,
|
||||
|
||||
Max17050_QH0 = 0x4C,
|
||||
MAX17050_QH = 0x4D,
|
||||
MAX17050_QL = 0x4E,
|
||||
|
||||
|
|
@ -111,6 +114,8 @@ enum MAX17050_reg {
|
|||
MAX17050_MaxVolt = 0x51, // Custom ID. Not to be sent to i2c.
|
||||
|
||||
MAX17050_VFSOC0Enable = 0x60,
|
||||
MAX17050_MODELEnable1 = 0x62,
|
||||
MAX17050_MODELEnable2 = 0x63,
|
||||
|
||||
MAX17050_MODELChrTbl = 0x80,
|
||||
|
||||
|
|
|
|||
|
|
@ -137,6 +137,7 @@ int max77620_regulator_enable(u32 id, int enable)
|
|||
return 1;
|
||||
}
|
||||
|
||||
// LDO only.
|
||||
int max77620_regulator_set_volt_and_flags(u32 id, u32 mv, u8 flags)
|
||||
{
|
||||
if (id > REGULATOR_MAX)
|
||||
|
|
@ -168,9 +169,9 @@ void max77620_config_default()
|
|||
_max77620_try_set_reg(MAX77620_REG_SD_CFG2, 4);
|
||||
}
|
||||
|
||||
void max77620_low_battery_monitor_config()
|
||||
void max77620_low_battery_monitor_config(bool enable)
|
||||
{
|
||||
_max77620_try_set_reg(MAX77620_REG_CNFGGLBL1,
|
||||
MAX77620_CNFGGLBL1_LBDAC_EN | MAX77620_CNFGGLBL1_MPPLD |
|
||||
MAX77620_CNFGGLBL1_LBDAC_EN | (enable ? MAX77620_CNFGGLBL1_MPPLD : 0) |
|
||||
MAX77620_CNFGGLBL1_LBHYST_200 | MAX77620_CNFGGLBL1_LBDAC_2800);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@
|
|||
* ldo2 | SDMMC1 | 50000 | 800000 | 1800000 | 3300000 |
|
||||
* ldo3 | GC ASIC | 50000 | 800000 | 3100000 | 3100000 | 3.1V (pcv)
|
||||
* ldo4 | RTC | 12500 | 800000 | 850000 | 850000 |
|
||||
* ldo5 | GC ASIC | 50000 | 800000 | 1800000 | 1800000 | 1.8V (pcv)
|
||||
* ldo5 | GC Card | 50000 | 800000 | 1800000 | 1800000 | 1.8V (pcv)
|
||||
* ldo6 | Touch, ALS | 50000 | 800000 | 2900000 | 2900000 | 2.9V
|
||||
* ldo7 | XUSB | 50000 | 800000 | 1050000 | 1050000 |
|
||||
* ldo8 | XUSB, DC | 50000 | 800000 | 1050000 | 1050000 |
|
||||
|
|
@ -113,6 +113,6 @@ int max77620_regulator_set_voltage(u32 id, u32 mv);
|
|||
int max77620_regulator_enable(u32 id, int enable);
|
||||
int max77620_regulator_set_volt_and_flags(u32 id, u32 mv, u8 flags);
|
||||
void max77620_config_default();
|
||||
void max77620_low_battery_monitor_config();
|
||||
void max77620_low_battery_monitor_config(bool enable);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,7 +1,8 @@
|
|||
/*
|
||||
* PMIC Real Time Clock driver for Nintendo Switch's MAX77620-RTC
|
||||
*
|
||||
* Copyright (c) 2018 CTCaer
|
||||
* Copyright (c) 2018-2019 CTCaer
|
||||
* Copyright (c) 2019 shchmue
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
@ -75,3 +76,94 @@ void max77620_rtc_stop_alarm()
|
|||
// Update RTC clock from RTC regs.
|
||||
i2c_send_byte(I2C_5, MAX77620_RTC_I2C_ADDR, MAX77620_RTC_UPDATE0_REG, MAX77620_RTC_WRITE_UPDATE);
|
||||
}
|
||||
|
||||
void max77620_rtc_epoch_to_date(u32 epoch, rtc_time_t *time)
|
||||
{
|
||||
u32 tmp, edays, year, month, day;
|
||||
|
||||
// Set time.
|
||||
time->sec = epoch % 60;
|
||||
epoch /= 60;
|
||||
time->min = epoch % 60;
|
||||
epoch /= 60;
|
||||
time->hour = epoch % 24;
|
||||
epoch /= 24;
|
||||
|
||||
// Calculate base date values.
|
||||
tmp = (u32)(((u64)4 * epoch + 102032) / 146097 + 15);
|
||||
tmp = (u32)((u64)epoch + 2442113 + tmp - (tmp >> 2));
|
||||
|
||||
year = (20 * tmp - 2442) / 7305;
|
||||
edays = tmp - 365 * year - (year >> 2);
|
||||
month = edays * 1000 / 30601;
|
||||
day = edays - month * 30 - month * 601 / 1000;
|
||||
|
||||
// Month/Year offset.
|
||||
if(month < 14)
|
||||
{
|
||||
year -= 4716;
|
||||
month--;
|
||||
}
|
||||
else
|
||||
{
|
||||
year -= 4715;
|
||||
month -= 13;
|
||||
}
|
||||
|
||||
// Set date.
|
||||
time->year = year;
|
||||
time->month = month;
|
||||
time->day = day;
|
||||
|
||||
// Set weekday.
|
||||
time->weekday = 0; //! TODO.
|
||||
}
|
||||
|
||||
u32 max77620_rtc_date_to_epoch(const rtc_time_t *time, bool hos_encoding)
|
||||
{
|
||||
u32 year, month, epoch;
|
||||
|
||||
//Year
|
||||
year = time->year;
|
||||
//Month of year
|
||||
month = time->month;
|
||||
|
||||
if (!hos_encoding)
|
||||
{
|
||||
// Month/Year offset.
|
||||
if(month < 3)
|
||||
{
|
||||
month += 12;
|
||||
year--;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
year -= 2000;
|
||||
month++;
|
||||
|
||||
// Month/Year offset.
|
||||
if(month < 3)
|
||||
{
|
||||
month += 9;
|
||||
year--;
|
||||
}
|
||||
else
|
||||
month -= 3;
|
||||
}
|
||||
|
||||
epoch = (365 * year) + (year >> 2) - (year / 100) + (year / 400); // Years to days.
|
||||
|
||||
if (!hos_encoding)
|
||||
{
|
||||
epoch += (30 * month) + (3 * (month + 1) / 5) + time->day; // Months to days.
|
||||
epoch -= 719561; // Epoch time is 1/1/1970.
|
||||
}
|
||||
else
|
||||
epoch += (30 * month) + ((3 * month + 2) / 5) + 59 + time->day; // Months to days.
|
||||
|
||||
epoch *= 86400; // Days to seconds.
|
||||
epoch += (3600 * time->hour) + (60 * time->min) + time->sec; // Add hours, minutes and seconds.
|
||||
|
||||
return epoch;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -71,5 +71,7 @@ typedef struct _rtc_time_t {
|
|||
|
||||
void max77620_rtc_get_time(rtc_time_t *time);
|
||||
void max77620_rtc_stop_alarm();
|
||||
void max77620_rtc_epoch_to_date(u32 epoch, rtc_time_t *time);
|
||||
u32 max77620_rtc_date_to_epoch(const rtc_time_t *time, bool hos_encoding);
|
||||
|
||||
#endif /* _MFD_MAX77620_RTC_H_ */
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (c) 2018-2019 CTCaer
|
||||
* Copyright (c) 2018-2020 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
@ -39,6 +39,7 @@
|
|||
|
||||
extern sdmmc_t sd_sdmmc;
|
||||
extern boot_cfg_t b_cfg;
|
||||
extern volatile nyx_storage_t *nyx_str;
|
||||
|
||||
/*
|
||||
* CLK_OSC - 38.4 MHz crystal.
|
||||
|
|
@ -78,8 +79,8 @@ void _config_gpios()
|
|||
PINMUX_AUX(PINMUX_AUX_UART3_TX) = 0;
|
||||
|
||||
// Set Joy-Con IsAttached direction.
|
||||
PINMUX_AUX(PINMUX_AUX_GPIO_PE6) = PINMUX_INPUT_ENABLE;
|
||||
PINMUX_AUX(PINMUX_AUX_GPIO_PH6) = PINMUX_INPUT_ENABLE;
|
||||
PINMUX_AUX(PINMUX_AUX_GPIO_PE6) = PINMUX_INPUT_ENABLE | PINMUX_TRISTATE;
|
||||
PINMUX_AUX(PINMUX_AUX_GPIO_PH6) = PINMUX_INPUT_ENABLE | PINMUX_TRISTATE;
|
||||
|
||||
// Set pin mode for Joy-Con IsAttached and UARTB/C TX pins.
|
||||
#if !defined (DEBUG_UART_PORT) || DEBUG_UART_PORT != UART_B
|
||||
|
|
@ -109,7 +110,7 @@ void _config_gpios()
|
|||
gpio_output_enable(GPIO_PORT_X, GPIO_PIN_7, GPIO_OUTPUT_DISABLE);
|
||||
|
||||
// Configure HOME as inputs.
|
||||
// PINMUX_AUX(PINMUX_AUX_BUTTON_HOME) = PINMUX_PULL_UP | PINMUX_INPUT_ENABLE;
|
||||
// PINMUX_AUX(PINMUX_AUX_BUTTON_HOME) = PINMUX_INPUT_ENABLE | PINMUX_TRISTATE;
|
||||
// gpio_config(GPIO_PORT_Y, GPIO_PIN_1, GPIO_MODE_GPIO);
|
||||
}
|
||||
|
||||
|
|
@ -160,7 +161,7 @@ void _mbist_workaround()
|
|||
// Enable specific clocks and disable all others.
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_H) = 0xC0; // Enable clock PMC, FUSE.
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_L) = 0x80000130; // Enable clock RTC, TMR, GPIO, BPMP_CACHE.
|
||||
//CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_L) = 0x80400130; // Keep USB data ON.
|
||||
//CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_L) = 0x80400130; // Keep USBD ON.
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_U) = 0x1F00200; // Enable clock CSITE, IRAMA, IRAMB, IRAMC, IRAMD, BPMP_CACHE_RAM.
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_V) = 0x80400808; // Enable clock MSELECT, APB2APE, SPDIF_DOUBLER, SE.
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_W) = 0x402000FC; // Enable clock PCIERX0, PCIERX1, PCIERX2, PCIERX3, PCIERX4, PCIERX5, ENTROPY, MC1.
|
||||
|
|
@ -184,6 +185,9 @@ void _mbist_workaround()
|
|||
|
||||
void _config_se_brom()
|
||||
{
|
||||
// Enable fuse clock.
|
||||
clock_enable_fuse(true);
|
||||
|
||||
// Skip SBK/SSK if sept was run.
|
||||
if (!(b_cfg.boot_cfg & BOOT_CFG_SEPT_RUN))
|
||||
{
|
||||
|
|
@ -217,10 +221,19 @@ void _config_se_brom()
|
|||
|
||||
void _config_regulators()
|
||||
{
|
||||
// Disable low battery shutdown monitor.
|
||||
max77620_low_battery_monitor_config(false);
|
||||
|
||||
// Disable SDMMC1 IO power.
|
||||
gpio_output_enable(GPIO_PORT_E, GPIO_PIN_4, GPIO_OUTPUT_DISABLE);
|
||||
max77620_regulator_enable(REGULATOR_LDO2, 0);
|
||||
sd_power_cycle_time_start = get_tmr_ms();
|
||||
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CNFGBBC, MAX77620_CNFGBBC_RESISTOR_1K);
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_ONOFFCNFG1,
|
||||
(1 << 6) | (3 << MAX77620_ONOFFCNFG1_MRT_SHIFT)); // PWR delay for forced shutdown off.
|
||||
|
||||
// Configure all Flexible Power Sequencers.
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG0,
|
||||
(7 << MAX77620_FPS_TIME_PERIOD_SHIFT));
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_CFG1,
|
||||
|
|
@ -236,10 +249,10 @@ void _config_regulators()
|
|||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_FPS_GPIO3,
|
||||
(4 << MAX77620_FPS_TIME_PERIOD_SHIFT) | (2 << MAX77620_FPS_PD_PERIOD_SHIFT)); // 3.x+
|
||||
|
||||
// Set vdd_core voltage to 1.125V
|
||||
// Set vdd_core voltage to 1.125V.
|
||||
max77620_regulator_set_voltage(REGULATOR_SD0, 1125000);
|
||||
|
||||
// Fix CPU/GPU after a Linux warmboot.
|
||||
// Fix CPU/GPU after a L4T warmboot.
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_GPIO5, 2);
|
||||
i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_GPIO6, 2);
|
||||
|
||||
|
|
@ -256,9 +269,6 @@ void _config_regulators()
|
|||
i2c_send_byte(I2C_5, MAX77621_GPU_I2C_ADDR, MAX77621_CONTROL2_REG,
|
||||
MAX77621_T_JUNCTION_120 | MAX77621_FT_ENABLE | MAX77621_CKKADV_TRIP_75mV_PER_US_HIST_DIS |
|
||||
MAX77621_CKKADV_TRIP_150mV_PER_US | MAX77621_INDUCTOR_NOMINAL);
|
||||
|
||||
// Enable low battery shutdown monitor for < 2800mV.
|
||||
max77620_low_battery_monitor_config();
|
||||
}
|
||||
|
||||
void config_hw()
|
||||
|
|
@ -312,6 +322,7 @@ void reconfig_hw_workaround(bool extra_reconfig, u32 magic)
|
|||
bpmp_mmu_disable();
|
||||
bpmp_clk_rate_set(BPMP_CLK_NORMAL);
|
||||
minerva_change_freq(FREQ_204);
|
||||
nyx_str->mtc_cfg.init_done = 0;
|
||||
|
||||
// Re-enable clocks to Audio Processing Engine as a workaround to hanging.
|
||||
CLOCK(CLK_RST_CONTROLLER_CLK_OUT_ENB_V) |= (1 << 10); // Enable AHUB clock.
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (c) 2018-2020 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
@ -19,7 +20,7 @@
|
|||
#include "i2c.h"
|
||||
#include "../utils/util.h"
|
||||
|
||||
static u32 i2c_addrs[] = {
|
||||
static const u32 i2c_addrs[] = {
|
||||
0x7000C000, 0x7000C400, 0x7000C500,
|
||||
0x7000C700, 0x7000D000, 0x7000D100
|
||||
};
|
||||
|
|
@ -121,6 +122,11 @@ int i2c_send_buf_small(u32 idx, u32 x, u32 y, u8 *buf, u32 size)
|
|||
return _i2c_send_pkt(idx, x, tmp, size + 1);
|
||||
}
|
||||
|
||||
int i2c_recv_buf(u8 *buf, u32 size, u32 idx, u32 x)
|
||||
{
|
||||
return _i2c_recv_pkt(idx, buf, size, x);
|
||||
}
|
||||
|
||||
int i2c_recv_buf_small(u8 *buf, u32 size, u32 idx, u32 x, u32 y)
|
||||
{
|
||||
int res = _i2c_send_pkt(idx, x, (u8 *)&y, 1);
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (c) 2020 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
@ -39,6 +40,7 @@
|
|||
|
||||
void i2c_init(u32 idx);
|
||||
int i2c_send_buf_small(u32 idx, u32 x, u32 y, u8 *buf, u32 size);
|
||||
int i2c_recv_buf(u8 *buf, u32 size, u32 idx, u32 x);
|
||||
int i2c_recv_buf_small(u8 *buf, u32 size, u32 idx, u32 x, u32 y);
|
||||
int i2c_send_byte(u32 idx, u32 x, u32 y, u8 b);
|
||||
u8 i2c_recv_byte(u32 idx, u32 x, u32 y);
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@ void nx_emmc_gpt_parse(link_t *gpt, sdmmc_storage_t *storage)
|
|||
for (u32 i = 0; i < hdr->num_part_ents; i++)
|
||||
{
|
||||
gpt_entry_t *ent = (gpt_entry_t *)(buf + (hdr->part_ent_lba - 1) * NX_EMMC_BLOCKSIZE + i * sizeof(gpt_entry_t));
|
||||
emmc_part_t *part = (emmc_part_t *)malloc(sizeof(emmc_part_t));
|
||||
emmc_part_t *part = (emmc_part_t *)calloc(sizeof(emmc_part_t), 1);
|
||||
part->lba_start = ent->lba_start;
|
||||
part->lba_end = ent->lba_end;
|
||||
part->attrs = ent->attrs;
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (c) 2019 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
@ -25,11 +26,12 @@
|
|||
|
||||
#define _PAGEOFF(x) ((x) & 0xFFFFF000)
|
||||
|
||||
#define _ADRP(r, o) 0x90000000 | ((((o) >> 12) & 0x3) << 29) | ((((o) >> 12) & 0x1FFFFC) << 3) | ((r) & 0x1F)
|
||||
#define _BL(a, o) 0x94000000 | ((((o) - (a)) >> 2) & 0x3FFFFFF)
|
||||
#define _B(a, o) 0x14000000 | ((((o) - (a)) >> 2) & 0x3FFFFFF)
|
||||
#define _MOVKX(r, i, s) 0xF2800000 | (((s) & 0x30) << 17) | (((i) & 0xFFFF) << 5) | ((r) & 0x1F)
|
||||
#define _MOVZX(r, i, s) 0xD2800000 | (((s) & 0x30) << 17) | (((i) & 0xFFFF) << 5) | ((r) & 0x1F)
|
||||
#define _ADRP(r, o) (0x90000000 | ((((o) >> 12) & 0x3) << 29) | ((((o) >> 12) & 0x1FFFFC) << 3) | ((r) & 0x1F))
|
||||
#define _BL(a, o) (0x94000000 | ((((o) - (a)) >> 2) & 0x3FFFFFF))
|
||||
#define _B(a, o) (0x14000000 | ((((o) - (a)) >> 2) & 0x3FFFFFF))
|
||||
#define _MOVKX(r, i, s) (0xF2800000 | (((s) & 0x30) << 17) | (((i) & 0xFFFF) << 5) | ((r) & 0x1F))
|
||||
#define _MOVZX(r, i, s) (0xD2800000 | (((s) & 0x30) << 17) | (((i) & 0xFFFF) << 5) | ((r) & 0x1F))
|
||||
#define _MOVZW(r, i, s) (0x52800000 | (((s) & 0x30) << 17) | (((i) & 0xFFFF) << 5) | ((r) & 0x1F))
|
||||
#define _NOP() 0xD503201F
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -34,6 +34,16 @@ u8 btn_read()
|
|||
return res;
|
||||
}
|
||||
|
||||
u8 btn_read_vol()
|
||||
{
|
||||
u8 res = 0;
|
||||
if (!gpio_read(GPIO_PORT_X, GPIO_PIN_7))
|
||||
res |= BTN_VOL_DOWN;
|
||||
if (!gpio_read(GPIO_PORT_X, GPIO_PIN_6))
|
||||
res |= BTN_VOL_UP;
|
||||
return res;
|
||||
}
|
||||
|
||||
u8 btn_wait()
|
||||
{
|
||||
u8 res = 0, btn = btn_read();
|
||||
|
|
@ -81,5 +91,8 @@ u8 btn_wait_timeout(u32 time_ms, u8 mask)
|
|||
};
|
||||
|
||||
// Timed out.
|
||||
return 0;
|
||||
if (!single_button || !time_ms)
|
||||
return (res & mask);
|
||||
else
|
||||
return 0; // Return no button press if single button requested.
|
||||
}
|
||||
|
|
|
|||
|
|
@ -26,6 +26,7 @@
|
|||
#define BTN_SINGLE (1 << 7)
|
||||
|
||||
u8 btn_read();
|
||||
u8 btn_read_vol();
|
||||
u8 btn_wait();
|
||||
u8 btn_wait_timeout(u32 time_ms, u8 mask);
|
||||
|
||||
|
|
|
|||
|
|
@ -1,5 +1,6 @@
|
|||
/*
|
||||
* Copyright (c) 2018 naehrwert
|
||||
* Copyright (c) 2020 CTCaer
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
|
|
@ -33,9 +34,10 @@
|
|||
#define LIST_FOREACH_SAFE(iter, list) \
|
||||
for(link_t *iter = (list)->next, *safe = iter->next; iter != (list); iter = safe, safe = iter->next)
|
||||
|
||||
/*! Iterate over all list members. */
|
||||
/*! Iterate over all list members and make sure that the list has at least one entry. */
|
||||
#define LIST_FOREACH_ENTRY(etype, iter, list, mn) \
|
||||
for(etype *iter = CONTAINER_OF((list)->next, etype, mn); &iter->mn != (list); iter = CONTAINER_OF(iter->mn.next, etype, mn))
|
||||
if ((list)->next != (list)) \
|
||||
for(etype *iter = CONTAINER_OF((list)->next, etype, mn); &iter->mn != (list); iter = CONTAINER_OF(iter->mn.next, etype, mn))
|
||||
|
||||
typedef struct _link_t
|
||||
{
|
||||
|
|
|
|||
|
|
@ -33,15 +33,22 @@ typedef struct _cfg_op_t
|
|||
u32 val;
|
||||
} cfg_op_t;
|
||||
|
||||
typedef struct _nyx_info_t
|
||||
{
|
||||
u32 rsvd;
|
||||
u32 errors;
|
||||
} nyx_info_t;
|
||||
|
||||
typedef struct _nyx_storage_t
|
||||
{
|
||||
u32 version;
|
||||
u32 cfg;
|
||||
u8 irama[0x8000];
|
||||
u8 hekate[0x30000];
|
||||
u8 rsvd[0x800000];
|
||||
u8 rsvd[0x800000 - sizeof(nyx_info_t)];
|
||||
nyx_info_t info;
|
||||
mtc_config_t mtc_cfg;
|
||||
emc_table_t mtc_table;
|
||||
emc_table_t mtc_table[10];
|
||||
} nyx_storage_t;
|
||||
|
||||
u32 get_tmr_us();
|
||||
|
|
|
|||
Loading…
Reference in New Issue